Re: [PATCH] security_ops locking

From: Jesse Pollard (pollardat_private)
Date: Thu Jul 25 2002 - 07:18:33 PDT

  • Next message: Robb Romans: "Re: new hook for do_sys_settimeofday"

    ---------  Received message begins Here  ---------
    
    > 
    > 
    > 
    > Chris Wright wrote:
    > 
    > > * James Morris (jmorrisat_private) wrote:
    > > 
    > > 
    > > Ok, this is the same thing I dug up.  Register size assignments are
    > > guaranteed atomic.
    > 
    > Well praise God for that; I originally wrote my code
    > assuming that. Greg KH's comment that they _aren't_
    > threw me for a loop (although it's very plausible -
    > so many things ARE different between architectures).
    > 
    > I'd like to document the assumption ("aligned pointer assignments
    > are atomic") as a comment in the code, with an
    > "authoritative as possible" source for this assertion.
    > Can anyone tell me WHERE they got that information, preferably
    > a very authoritative source?  Or at least, identify platforms
    > where they can be SURE it's true?
    > 
    > Conversely, can anyone (ESPECIALLY Greg KH!) tell me any
    > architecture this assumption is NOT true on, or where I could go
    > to find such?
    > 
    > Googling last night didn't really get me anywhere.
    > I could download every processor and bus spec, but that would
    > be a multi-year research project :-(.
    
    Simple - it isn't true in any arch where the bus size is not equal to the
    pointer size (usually meaning "bus size is less than pointer size").
    
    The VAX processor had quad sized data transfer, but a 32 bit
    pointer. Sometimes pointers would get hosed (usually for 64 bit pointer
    sets). I only read about problems when multiple CPUs were involved with shared
    memory (yet another size). alignment with one frame (32 bits) would not
    necessarily be aligned for cache transfer. The bus size on VAX arch varied
    from 16 bits to 64 bits, depending on the system.
    
    I do agree that 99% of the current implementations ARE atomic at the
    "aligned" 32 bit level. However... newer systems are now doing 64, and
    128 bit units, and this introduces potential "nonaligned" transfers that
    were not anticipated. I do wonder about the PDA bus though (and that IBM
    wrist watch computer).
    
    I don't know of any system where this should be a problem at this time.
    -------------------------------------------------------------------------
    Jesse I Pollard, II
    Email: pollardat_private
    
    Any opinions expressed are solely my own.
    _______________________________________________
    linux-security-module mailing list
    linux-security-moduleat_private
    http://mail.wirex.com/mailman/listinfo/linux-security-module
    



    This archive was generated by hypermail 2b30 : Thu Jul 25 2002 - 07:20:56 PDT