On Wed, 09 Apr 2003 22:17:42 +0500, Ali Saifullah Khan <saifullahat_private> said: > What is the approx. number of clock cycles required to decrypt a 56-bit DES > key / signature ? In general, difficult to predict. Assuming a really smart hardware implementation, you can probably get it down to around 32 cycles (assuming a PAL to do the S-box and other stuff), doing each of 16 rounds in 2 cycles. A really good software implementation will need more, and a stupid implementation will require even more. (I'm handwaving about key setup here...) In addition, there's key initialization issues - very rarely is DES used to encrypt only one block. So you usually take a big hit in setting up the keys on the first block, and then subsequent blocks take a much smaller hit. Also, note that "clock cycles" is *always* a total crock when trying to compare across different architectures - the *SAME* instruction can take a different number of cycles on a Pentium-4, a Pentium-3, a Crusoe chip - and those are all the same software architecture. Comparing it to cycle count on a MIPS or Power3 chipset would be a total loss. Then add in issues like instruction parallelism and cache structure.....
This archive was generated by hypermail 2b30 : Wed Apr 09 2003 - 11:33:24 PDT