On Thu, 10 Apr 2003 05:06:51 BST, Glynn Clements said: > Theoretically you could just expand the operation to minterms > (sum-of-products), although it might result in a rather large chip. If > you have enough gates, any computation on fixed-sized inputs can be > performed solely by combinatorial logic (i.e. "in one cycle"). "I have come up with a truly elegant design for doing this for the S-boxes, however it is too large to fit in the margins of this OC-12" ;) Enough already, I think we've made the point that the cycle count is indeterminate. Now for a twist, how about something more useful, like how many (K-M)bytes/sec a given real-world implementation is able to handle? For bonus points, discuss key scheduling issues: It's well known that many DES implementations have a fairly heavy penalty for key setup, with the result that programs like the venerable 'crack' are able to test far fewer keys/second than you would expect based on how many Mbytes/sec they can crypt in a stream with the same key. What's the currently best known real-world result for optimizing this?
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